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  LTC6404 1 6404f typical application features applications description 600mhz, low noise, high precision fully differential input/output ampli er/driver single-ended input to differential output with common mode level shifting n fully differential input and output n low noise: 1.5nv/ hz rti n very low distortion: LTC6404-1 (2v p-p , 10mhz): C91dbc LTC6404-2 (2v p-p , 10mhz): C96dbc LTC6404-4 (2v p-p , 10mhz): C101dbc n closed-loop C3db bandwidth: 600mhz n slew rate: 1200v/s (LTC6404-4) n adjustable output common mode voltage n rail-to-rail output swing n input range extends to ground n large output current: 85ma (typ) n dc voltage offset < 2mv (max) n low power shutdown n tiny 3mm 3mm 0.75mm 16-pin qfn package n differential input a/d converter driver n single-ended to differential conversion/ampli? cation n common mode level translation n low voltage, low noise, signal processing the ltc ? 6404 is a family of ac precision, very low noise, low distortion, fully differential input/output ampli? ers optimized for 3v, single supply operation. the LTC6404-1 is unity-gain stable. the LTC6404-2 is designed for closed-loop gains greater than or equal to 2v/v. the LTC6404-4 is designed for closed-loop gains greater than or equal to 4v/v. the LTC6404 closed-loop bandwidth extends from dc to 600mhz. in addition to the normal un? ltered outputs (out + and out C ), the LTC6404 has a built-in 88.5mhz differential single-pole lowpass ? lter and an additional pair of ? ltered outputs (outf + , outf C ). an input referred voltage noise of 1.5nv/ hz make the LTC6404 able to drive state-of-the-art 16-/18-bit adcs while operating on the same supply voltage, saving system cost and power. the LTC6404 is characterized, and maintains its performance for supplies as low as 2.7v and can operate on supplies up to 5.25v. it draws only 27.3ma, and has a hardware shutdown feature which reduces cur- rent consumption to 250a. the LTC6404 family is available in a compact 3mm 3mm 16-pin leadless qfn package and operates over a C40c to 125c temperature range. l , lt, ltc and ltm are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. C + 402 3v 0.1f v ocm 1.5vdc 1.5vdc 0v 6404 ta01 v s 1v p-p 402 100 50 signal generator 71.5 130 0.1f 1.5vdc 1v p-p 0.5v p-p LTC6404-4 distortion vs frequency frequency (mhz) 0.1 C100 hd2, hd3 (dbc) C90 C80 C70 C60 1 10 100 64044 g16 C110 C120 C130 C50 C40 v cm = v ocm = mid-supply v s = 3v v out = 2v p-p r i = 100, r f = 402 differential input single-ended input hd2 hd2 hd3 hd3
LTC6404 2 6404f absolute maximum ratings total supply voltage (v + to v ? ) ................................5.5v input voltage: in + , in ? , v ocm , shdn (note 2) ...................... v + to v ? input current: in + , in ? , v ocm , shdn (note 2) ........................10ma output short-circuit duration (note 3) ............ inde? nite output current (continuous): (outf + , outf ? ) dc + ac rms ...........................40ma operating temperature range (note 4).. ?40c to 125c speci? ed temperature range (note 5) .. ?40c to 125c junction temperature ........................................... 150c storage temperature range ................... ?65c to 150c (note 1) 16 17 15 14 13 5 6 7 8 top view ud package 16-lead (3mm s 3mm) plastic qfn 9 10 11 12 4 3 2 1shdn v + v ? v ocm v ? v + v + v ? nc in + out ? outf ? nc in ? out + outf + t jmax = 150c,  ja = 68c/w,  jc = 4.2c/w exposed pad (pin 17) is v ? , must be soldered to pcb order information pin configuration lead free finish tape and reel part marking* package description specified temperature range LTC6404cud-1#pbf LTC6404cud-1#trpbf lclw 16-lead (3mm 3mm) plastic qfn 0c to 70c LTC6404iud-1#pbf LTC6404iud-1#trpbf lclw 16-lead (3mm 3mm) plastic qfn ?40c to 85c LTC6404hud-1#pbf LTC6404hud-1#trpbf lclw 16-lead (3mm 3mm) plastic qfn ?40c to 125c LTC6404cud-2#pbf LTC6404cud-2#trpbf lclx 16-lead (3mm 3mm) plastic qfn 0c to 70c LTC6404iud-2#pbf LTC6404iud-2#trpbf lclx 16-lead (3mm 3mm) plastic qfn ?40c to 85c LTC6404hud-2#pbf LTC6404hud-2#trpbf lclx 16-lead (3mm 3mm) plastic qfn ?40c to 125c LTC6404cud-4#pbf LTC6404cud-4#trpbf lcly 16-lead (3mm 3mm) plastic qfn 0c to 70c LTC6404iud-4#pbf LTC6404iud-4#trpbf lcly 16-lead (3mm 3mm) plastic qfn ?40c to 85c LTC6404hud-4#pbf LTC6404hud-4#trpbf lcly 16-lead (3mm 3mm) plastic qfn ?40c to 125c consult ltc marketing for parts speci? ed with wider operating temperature ranges. *the temperature grade is identi? ed by a label on the shipping container. consult ltc marketing for information on non-standard lead based ? nish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www.linear.com/tapeandreel/
LTC6404 3 6404f the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v + = 3v, v C = 0v, v cm = v ocm = v icm = mid-supply, v shdn = open, r l = open, r bal = 100k (see figure 1). for the LTC6404-1: r i = 100, r f = 100. for the LTC6404-2: r i = 100, r f = 200. for the LTC6404-4: r i = 100, r f = 402, unless otherwise noted. v s is de? ned (v + C v C ). v outcm = (v out + + v out C )/2. v icm is de? ned (v in + + v in C )/2. v outdiff is de? ned (v out + C v out C ). v indiff = (v inp C v inm ) symbol parameter conditions min typ max units v osdiff differential offset voltage (input referred) v s = 2.7v to 5.25v l 0.5 2 mv v osdiff / t differential offset voltage drift (input referred) v s = 2.7v to 5.25v 1 v/c i b input bias current (note 6) v s = 2.7v to 5.25v l C60 C23 0 a i b / t input bias current drift (note 6) v s = 2.7v to 5.25v 0.01 a/c i os input offset current (note 6) v s = 2.7v to 5.25v l 1 10 a r in input resistance common mode differential mode 1000 3 k k c in input capacitance 1pf e n differential input referred noise voltage density f = 1mhz 1.5 nv/ hz i n input noise current density f = 1mhz 3 pa/ hz e nvocm input referred common mode noise voltage density f = 1mhz, referred to v ocm pin LTC6404-1 LTC6404-2 LTC6404-4 9 10.5 27 nv/ hz nv/ hz nv/ hz v icmr (note 7) input signal common mode range v s = 3v v s = 5v l l 0 0 1.6 3.6 v v cmrri (note 8) input common mode rejection ratio (input referred) v icm / v osdiff v s = 3v, v cm = 0.75v v s = 5v, v cm = 1.25v 60 60 db db cmrrio (note 8) output common mode rejection ratio (input referred) v ocm / v osdiff v s = 5v, v ocm = 1v 66 db psrr (note 9) differential power supply rejection ( v s / v osdiff ) v s = 2.7v to 5.25v l 60 94 db psrrcm (note 9) output common mode power supply rejection ( v s / v oscm ) v s = 2.7v to 5.25v LTC6404-1 LTC6404-2 LTC6404-4 l l l 50 50 40 63 63 51 db db db g cm common mode gain ( v outcm / v ocm )v s = 5v, v ocm = 1v LTC6404-1 LTC6404-2 LTC6404-4 l l l 1 1 0.99 v/v v/v v/v common mode gain error v s = 5v, v ocm = 1v LTC6404-1 LTC6404-2 LTC6404-4 l l l C0.6 C0.6 C1.6 C0.125 C0.25 C1 0.1 0.1 C0.4 % % % bal output balance ( v outcm / v outdiff ) v outdiff = 2v, single-ended input LTC6404-1 LTC6404-2 LTC6404-4 l l l C60 C60 C53 C40 C40 C40 db db db v outdiff = 2v, differential input LTC6404-1 LTC6404-2 LTC6404-4 l l l C66 C66 C66 C40 C40 C40 db db db v oscm common mode offset voltage (v outcm C v ocm )v s = 2.7v to 5.25v LTC6404-1 LTC6404-2 LTC6404-4 l l l 10 20 40 25 50 100 mv mv mv LTC6404 dc electrical characteristics
LTC6404 4 6404f symbol parameter conditions min typ max units v oscm / t common mode offset voltage drift v s = 2.7v to 5.25v LTC6404-1 LTC6404-2 LTC6404-4 10 20 20 v/c v/c v/c v outcmr (note 7) output signal common mode range (voltage range for the v ocm pin) v s = 3v LTC6404-1 LTC6404-2 LTC6404-4 l l l 1.1 1.1 1.1 2 2 1.7 v v v v s = 5v LTC6404-1 LTC6404-2 LTC6404-4 l l l 1.1 1.1 1.1 4 4 3.7 v v v r invocm input resistance, v ocm pin LTC6404-1 LTC6404-2 LTC6404-4 l l l 15 8 4 23.5 14 7 32 20 10 k k k v mid voltage at the v ocm pin v s = 3v l 1.45 1.5 1.55 v v out output voltage high, either output pin (note 10) v s = 3v, i l = 0ma v s = 3v, i l = 5ma v s = 3v, i l = 20ma l l l 325 360 480 550 600 750 mv mv mv v s = 5v, i l = 0ma v s = 5v, i l = 5ma v s = 5v, i l = 20ma l l l 460 500 650 700 750 1000 mv mv mv output voltage low, either output pin (note 10) v s = 3v, i l = 0ma v s = 3v, i l = C5ma v s = 3v, i l = C20ma l l l 120 140 200 230 260 350 mv mv mv v s = 5v, i l = 0ma v s = 5v, i l = C5ma v s = 5v, i l = C20ma l l l 175 200 285 320 350 550 mv mv mv i sc output short-circuit current, either output pin (note 11) v s = 2.7v v s = 3v v s = 5v l l l 35 40 55 60 65 85 ma ma ma a vol large-signal voltage gain v s = 3v 90 db v s supply voltage range l 2.7 5.25 v i s supply current (LTC6404-1) v s = 2.7v, v shdn = v s C 0.6v v s = 3v, v shdn = v s C 0.6v v s = 5v, v shdn = v s C 0.6v l l l 27.2 27.3 27.8 35.5 35.5 36.5 ma ma ma supply current (LTC6404-2) v s = 2.7v, v shdn = v s C 0.6v v s = 3v, v shdn = v s C 0.6v v s = 5v, v shdn = v s C 0.6v l l l 29.7 29.8 30.4 38.5 38.5 39.5 ma ma ma supply current (LTC6404-4) v s = 2.7v, v shdn = v s C 0.6v v s = 3v, v shdn = v s C 0.6v v s = 5v, v shdn = v s C 0.6v l l l 30.0 30.2 31.0 39 39 40 ma ma ma i shdn supply current in shutdown (LTC6404-1) v s = 2.7v, v shdn = v s C 2.1v v s = 3v, v shdn = v s C 2.1v v s = 5v, v shdn = v s C 2.1v l l l 0.22 0.25 0.35 1 1 2 ma ma ma supply current in shutdown (LTC6404-2) v s = 2.7v, v shdn = v s C 2.1v v s = 3v, v shdn = v s C 2.1v v s = 5v, v shdn = v s C 2.1v l l l 0.22 0.25 0.35 1 1 2 ma ma ma supply current in shutdown (LTC6404-4) v s = 2.7v, v shdn = v s C 2.1v v s = 3v, v shdn = v s C 2.1v v s = 5v, v shdn = v s C 2.1v l l l 0.28 0.30 0.50 1.2 1.2 2.4 ma ma ma the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v + = 3v, v C = 0v, v cm = v ocm = v icm = mid-supply, v shdn = open, r l = open, r bal = 100k (see figure 1). for the LTC6404-1: r i = 100, r f = 100. for the LTC6404-2: r i = 100, r f = 200. for the LTC6404-4: r i = 100, r f = 402, unless otherwise noted. v s is de? ned (v + C v C ). v outcm = (v out + + v out C )/2. v icm is de? ned (v in + + v in C )/2. v outdiff is de? ned (v out + C v out C ). v indiff = (v inp C v inm ) LTC6404 dc electrical characteristics
LTC6404 5 6404f the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v + = 3v, v C = 0v, v cm = v ocm = v icm = mid-supply, v shdn = open, r i = 100, r f = 100, r l = 200 (see figure 2) unless otherwise noted. v s is de? ned (v + C v C ). v outcm = (v out + + v out C )/2. v icm is de? ned as (v in + + v in C )/2. v outdiff is de? ned as (v out + C v out C ). v indiff = (v inp C v inm ). LTC6404-1 ac electrical characteristics symbol parameter conditions min typ max units sr slew rate v s = 3v to 5v 450 v/s gbw gain-bandwidth product v s = 3v to 5v, r i = 100, r f = 499, f test = 500mhz 500 mhz f 3db C3db frequency (see figure 2) v s = 3v to 5v l 300 600 mhz hd sein 10mhz distortion v s = 3v, v outdiff = 2v p-p single-ended input 2nd harmonic 3rd harmonic C88 C91 dbc dbc hd diffin 10mhz distortion v s = 3v, v outdiff = 2v p-p differential input 2nd harmonic 3rd harmonic C102 C91 dbc dbc imd 10m third-order imd at 10mhz f 1 = 9.5mhz, f 2 = 10.5mhz v s = 3v, v outdiff = 2v p-p C93 dbc oip3 10m oip3 at 10mhz (note 12) 50 dbm t s settling time 2v step at output 1% settling 0.1% settling 0.01% settling 10 13 17 ns ns ns nf noise figure, r s = 50 f = 10mhz 13.4 db f 3dbfilter differential filter 3db bandwidth (note 13) 88.5 mhz the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v + = 3v, v C = 0v, v cm = v ocm = v icm = mid-supply, v shdn = open, r l = open, r bal = 100k (see figure 1). for the LTC6404-1: r i = 100, r f = 100. for the LTC6404-2: r i = 100, r f = 200. for the LTC6404-4: r i = 100, r f = 402, unless otherwise noted. v s is de? ned (v + C v C ). v outcm = (v out + + v out C )/2. v icm is de? ned (v in + + v in C )/2. v outdiff is de? ned (v out + C v out C ). v indiff = (v inp C v inm ) LTC6404 dc electrical characteristics symbol parameter conditions min typ max units v il shdn input logic low v s = 2.7v to 5v l v + C 2.1 v v ih shdn input logic high v s = 2.7v to 5v l v + C 0.6 v r shdn shdn pin input impedance v s = 5v, v shdn = 2.9v to 0v l 38 66 94 k t on turn-on time v s = 3v, v shdn = 0.5v to 3v 750 ns t off turn-off time v s = 3v, v shdn = 3v to 0.5v 300 ns
LTC6404 6 6404f the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v + = 3v, v C = 0v, v cm = v ocm = v icm = mid-supply, v shdn = open, r i = 100, r f = 200, r l = 200 (see figure 2) unless otherwise noted. v s is de? ned (v + C v C ). v outcm = (v out + + v out C )/2. v icm is de? ned as (v in + + v in C )/2. v outdiff is de? ned as (v out + C v out C ). v indiff = (v inp C v inm ). LTC6404-2 ac electrical characteristics symbol parameter conditions min typ max units sr slew rate v s = 3v to 5v 700 v/s gbw gain-bandwidth product v s = 3v to 5v, r i = 100, r f = 499, f test = 500mhz 900 mhz f 3db C3db frequency (see figure 2) v s = 3v to 5v l 300 600 mhz hd sein 10mhz distortion v s = 3v, v outdiff = 2v p-p single-ended input 2nd harmonic 3rd harmonic C95 C96 dbc dbc hd diffin 10mhz distortion v s = 3v, v outdiff = 2v p-p differential input 2nd harmonic 3rd harmonic C98 C99 dbc dbc imd 10m third-order imd at 10mhz f 1 = 9.5mhz, f 2 = 10.5mhz v s = 3v, v outdiff = 2v p-p C100 dbc oip3 10m oip3 at 10mhz (note 12) 53 dbm t s settling time 2v step at output 1% settling 0.1% settling 0.01% settling 9 12 15 ns ns ns nf noise figure, r s = 50 f = 10mhz 10 db f 3dbfilter differential filter 3db bandwidth (note 13) 88.5 mhz the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v + = 3v, v C = 0v, v cm = v ocm = v icm = mid-supply, v shdn = open, r i = 100, r f = 402, r l = 200 (see figure 2) unless otherwise noted. v s is de? ned (v + C v C ). v outcm = (v out + + v out C )/2. v icm is de? ned as (v in + + v in C )/2. v outdiff is de? ned as (v out + C v out C ). v indiff = (v inp C v inm ). LTC6404-4 ac electrical characteristics symbol parameter conditions min typ max units sr slew rate v s = 3v to 5v 1200 v/s gbw gain-bandwidth product v s = 3v to 5v, r i = 100, r f = 499, f test = 500mhz 1700 mhz f 3db C3db frequency (see figure 2) v s = 3v to 5v l 300 530 mhz hd sein 10mhz distortion v s = 3v, v outdiff = 2v p-p single-ended input 2nd harmonic 3rd harmonic C97 C98 dbc dbc hd diffin 10mhz distortion v s = 3v, v outdiff = 2v p-p differential input 2nd harmonic 3rd harmonic C100 C101 dbc dbc imd 10m third-order imd at 10mhz f 1 = 9.5mhz, f 2 = 10.5mhz v s = 3v, v outdiff = 2v p-p C101 dbc oip3 10m oip3 at 10mhz (note 12) 54 dbm t s settling time 2v step at output 1% settling 0.1% settling 0.01% settling 8 11 14 ns ns ns nf noise figure, r s = 50 f = 10mhz 8 db f 3dbfilter differential filter 3db bandwidth (note 13) 88.5 mhz
LTC6404 7 6404f note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the inputs in + , in C are protected by a pair of back-to-back diodes. if the differential input voltage exceeds 1.4v, the input current should be limited to less than 10ma. input pins (in + , in C , v ocm and shdn ) are also protected by steering diodes to either supply. if the inputs should exceed either supply voltage, the input current should be limited to less than 10ma. note 3: a heat sink may be required to keep the junction temperature below the absolute maximum rating when the output is shorted inde? nitely. long-term application of output currents in excess of the absolute maximum ratings may impair the life of the device. note 4: the LTC6404c/LTC6404i are guaranteed functional over the operating temperature range C40c to 85c. the LTC6404h is guaranteed functional over the operating temperature range C40c to 125c. note 5: the LTC6404c is guaranteed to meet speci? ed performance from 0c to 70c. the LTC6404c is designed, characterized, and expected to meet speci? ed performance from C40c to 85c but is not tested or qa sampled at these temperatures. the LTC6404i is guaranteed to meet speci? ed performance from C40c to 85c. the LTC6404h is guaranteed to meet speci? ed performance from C40c to 125c. note 6: input bias current is de? ned as the average of the input currents ? owing into pin 6 and pin 15 (in C and in + ). input offset current is de? ned as the difference of the input currents ? owing into pin 15 and pin 6 (i os = i b + C i b C ) note 7: input common mode range is tested using the test circuit of figure 1 by measuring the differential gain with a 1v differential output with v icm = mid-supply, and with v icm at the input common mode range limits listed in the electrical characteristics table, verifying the differential gain has not deviated from the mid-supply common mode input case by more than 1%, and the common mode offset (v oscm ) has not deviated from the zero bias common mode offset by more than 15mv (LTC6404-1), 20mv (LTC6404-2) or 40mv (LTC6404-4). the voltage range for the output common mode range is tested using the test circuit of figure 1 by applying a voltage on the v ocm pin and testing at both mid-supply and at the electrical characteristics table limits to verify that the the common mode offset (v oscm ) has not deviated by more than 15mv (LTC6404-1), 20mv (LTC6404-2) or 40mv (LTC6404-4). note 8: input cmrr is de? ned as the ratio of the change in the input common mode voltage at the pins in + or in C to the change in differential input referred voltage offset. output cmrr is de? ned as the ratio of the change in the voltage at the v ocm pin to the change in differential input referred voltage offset. these speci? cations are strongly dependent on feedback ratio matching between the two outputs and their respective inputs, and is dif? cult to measure actual ampli? er performance. (see the effects of resistor pair mismatch in the applications information section of this data sheet. for a better indicator of actual ampli? er performance independent of feedback component matching, refer to the psrr speci? cation. note 9: differential power supply rejection (psrr) is de? ned as the ratio of the change in supply voltage to the change in differential input referred voltage offset. common mode power supply rejection (psrrcm) is de? ned as the ratio of the change in supply voltage to the change in the common mode offset, v outcm C v ocm . note 10: this parameter is pulse tested. output swings are measured as differences between the output and the respective power supply rail. note 11: this parameter is pulse tested. extended operation with the output shorted may cause junction temperatures to exceed the 125c limit and is not recommended. see note 3 for more details. note 12: since the LTC6404 is a voltage feedback ampli? er with low output impedance, a resistive load is not required when driving an adc. therefore, typical output power is very small. in order to compare the LTC6404 with ampli? ers that require 50 output loads, output swing of the LTC6404 driving an adc is converted into an effective oip3 as if the LTC6404 were driving a 50 load. note 13: the capacitors used to set the ? lter pole might have up to 15% variation. the resistors used to set the ? lter pole might have up to 12% variation. electrical characteristics
LTC6404 8 6404f LTC6404-1 typical performance characteristics active supply current vs temperature shutdown supply current vs temperature differential voltage offset (input referred) vs temperature common mode voltage offset vs temperature active supply current vs supply voltage and temperature shdn supply current vs supply voltage and temperature shdn pin current vs shdn pin voltage and temperature supply current vs shdn pin voltage and temperature small-signal frequency response temperature (c) C75 24 i cc (ma) 25 27 28 29 C25 25 50 150 64041 g01 26 C50 0 75 100 125 30 v s = 2.7v v cm = v ocm = mid-supply v s = 5v v s = 3v temperature (c) C75 0 i cc (ma) 0.1 0.3 0.4 0.5 C25 25 50 150 64041 g02 0.2 C50 0 75 100 125 v s = 2.7v v cm = v ocm = mid-supply v s = 5v v s = 3v temperature (c) C75 C1.0 v osdiff (mv) C0.8 C0.4 C0.2 0 1.0 0.4 C25 25 50 150 64041 g03 C0.6 0.6 0.8 0.2 C50 0 75 100 125 5 representative units v cm = v ocm = mid-supply v s = 3v temperature (c) C75 C10 v oscm (mv) C8 C4 C2 0 10 4 C25 25 50 150 64041 g04 C6 6 8 2 C50 0 75 100 125 5 representative units v cm = v ocm = mid-supply v s = 3v v supply (v) 0 0 i cc (ma) 5 10 15 20 245 64041 g05 25 30 13 t a = 125c t a = 105c t a = 90c t a = 75c t a = 50c t a = 25c t a = C10c t a = C45c t a = C60c v cm = v ocm = mid-supply shdn = v + v supply (v) 0 0 i cc (ma) 0.1 0.2 0.3 245 64041 g06 0.4 0.5 13 v cm = v ocm = mid-supply shdn = v C t a = 125c t a = 105c t a = 90c t a = 75c t a = 50c t a = 25c t a = C10c t a = C45c t a = C60c shdn pin voltage (v) 0 C30 shdn pin current (a) C5 C10 C15 C20 1.5 0.5 2.5 3.0 64041 g07 C25 0 1.0 2.0 v cm = v ocm = mid-supply v s = 3v t a = 125c t a = 105c t a = 90c t a = 75c t a = 50c t a = 25c t a = C10c t a = C45c t a = C60c shdn pin voltage (v) 0 i cc (ma) 1.5 0.5 2.5 3.0 64041 g08 1.0 2.0 v cm = v ocm = mid-supply v s = 3v 0 5 10 15 20 25 30 t a = 125c t a = 105c t a = 90c t a = 75c t a = 50c t a = 25c t a = C10c t a = C45c t a = C60c frequency (mhz) 10 gain (db) 100 1000 64041 g09 C20 C15 C10 C5 0 5 unfiltered outputs v cm = v ocm = mid-supply t a = 25c r f = r i = 100, c f in parallel with r f c f = 0pf c f = 1.8pf v s = 3v v s = 5v
LTC6404 9 6404f small-signal frequency response vs gain setting resistor values and supply voltage small-signal frequency response vs c load small-signal frequency response vs temperature small-signal frequency response vs temperature large-signal step response small-signal step response distortion vs frequency distortion vs input common mode voltage frequency (mhz) 10 gain (db) 100 1000 64041 g10 C30 C20 C25 C15 C10 C5 0 5 unfiltered outputs v cm = v ocm = mid-supply t a = 25c v s = 3v and v s = 5v r f = r i = 499 r f = r i = 200 r f = r i = 100 v s = 3v v s = 5v frequency (mhz) 10 gain (db) 100 1000 64041 g11 C20 C15 C10 C5 0 10 5 unfiltered outputs v cm = v ocm = mid-supply t a = 25c r f = r i = 100 v s = 3v and v s = 5v r load = 200, (each output to ground) c load = 0pf c load = 10pf c load = 5pf frequency (mhz) 10 gain (db) 100 1000 64041 g12 C20 C15 C10 C5 0 10 5 unfiltered outputs v cm = v ocm = mid-supply r f = r i = 100 v s = 3v and v s = 5v t a = 90c t a = C45c t a = 25c frequency (mhz) 10 gain (db) 100 1000 64041 g13 C35 C30 C20 C25 C15 C10 C5 0 5 filtered differential output unfiltered differential output t a = 25c t a = 25c t a = 90c filtered output v cm = v ocm = mid-supply r f = r i = 100 v s = 3v and v s = 5v t a = C45c time (ns) 0 C1.5 v outdiff (out + C out C ) (v) C1.0 C0.5 0 61215 64041 g14 0.5 1.0 1.5 39 v cm = v ocm = mid-supply r f = r i = 100 v outdiff v indiff time (ns) 0 C0.50 v outdiff (out + C out C ) (v) C0.25 0 0.25 61215 64041 g15 0.50 39 v cm = v ocm = mid-supply r f = r i = 100 v outdiff v indiff frequency (mhz) 0.1 C80 hd2, hd3 (dbc) C60 C40 1.0 10 100 64041 g16 C100 C90 C70 C50 C110 C120 v cm = v ocm = mid-supply v s = 3v v outdiff = 2v p-p r f = r i = 100 differential input single-ended input hd2 hd2 hd3 hd3 hd2, hd3 (dbc) 64041 g17 hd2 hd2 hd3 hd3 dc common mode input (at in + and in C pins) (v) C110 C40 C50 C60 C70 C80 C90 C100 v s = 3v r f = r i = 100 v in = 2v p-p f in = 10mhz differential input single-ended input 0 1.5 0.5 2.5 3.0 1.0 2.0 distortion vs output amplitude hd2, hd3 (dbc) 64041 g18 hd2 hd3 v outdiff (v p-p ) ?110 ?30 ?40 ?50 ?60 ?70 ?80 ?90 ?100 v cm = v ocm = mid-supply v s = 3v t a = 25 o c c f = 0pf r f = r i = 100 7 v in = fully differential input f in = 10mhz 03 156 24 LTC6404-1 typical performance characteristics
LTC6404 10 6404f distortion vs output amplitude LTC6404-1 driving ltc2207 16-bit adc LTC6404-1 driving ltc2207 16-bit adc voltage noise density vs frequency hd2, hd3 (dbc) 64041 g19 hd2 hd3 v outdiff (v p-p ) C110 C30 C40 C50 C60 C70 C80 C90 C100 v cm = v ocm = mid-supply v s = 3v t a = 25c r f = r i = 100 v in = single-ended input f in = 10mhz 03 15 24 (db) 64041 g20 hd2 hd3 hd7 hd9 hd5 hd4 frequency (mhz) C120 0 C20 C40 C60 C80 C100 v cm = v ocm = 1.7v v s = 3.3v r f = r i = 100 v in = 2v p-p differential f sample = 105msps 10mhz, 4092 point fft fundamental = C1dbfs hd2 = C98.8dbc hd3 = C90.2dbc 030 10 50 20 40 frequency (mhz) 0.01 voltage noise density (nv/ hz ) 1 100 1000 0.1 10 64041 g22 1 10 100 v cm = v ocm = mid-supply v s = 3v t a = 25c r f = r i = 100 differential input referred common mode (db) 64041 g21 hd2 hd3 hd7 hd8 hd9 hd5 hd4 frequency (mhz) C120 0 C20 C40 C60 C80 C100 v cm = v ocm = 1.5v v s = 3v r f = r i = 100 v in = 2v p-p differential f sample = 105msps 10mhz, 65536 point fft fundamental = C1dbfs hd2 = C90.7dbc hd3 = C86.6dbc 030 10 50 20 40 LTC6404-1 noise figure vs frequency frequency (mhz) 0 12 8 4 28 24 20 16 64041 g23 noise figure (db) 10 1000 100 v cm = v ocm = mid-supply v s = 3v t a = 25c see figure 2 circuit LTC6404-1 typical performance characteristics
LTC6404 11 6404f LTC6404-2 typical performance characteristics active supply current vs temperature shutdown supply current vs temperature differential voltage offset (input referred) vs temperature common mode voltage offset (input referred) vs temperature active supply current vs supply voltage and temperature shdn supply current vs supply voltage and temperature shdn pin current vs shdn pin voltage and temperature supply current vs shdn pin voltage and temperature small-signal frequency response temperature (c) C75 27 i cc (ma) 28 30 31 32 C25 25 50 150 64042 g01 29 C50 0 75 100 125 33 v s = 2.7v v s = 5v v s = 3v v cm = v ocm = mid-supply temperature (c) C75 0 i cc (ma) 0.1 0.3 0.4 0.5 C25 25 50 150 64042 g02 0.2 C50 0 75 100 125 v s = 2.7v v cm = v ocm = mid-supply v s = 5v v s = 3v temperature (c) C75 C1.0 v osdiff (mv) C0.8 C0.4 C0.2 0 1.0 0.4 C25 25 50 150 64042 g03 C0.6 0.6 0.8 0.2 C50 0 75 100 125 5 representative units v cm = v ocm = mid-supply v s = 3v temperature (c) C75 C10 v oscm (mv) C8 C4 C2 0 10 4 C25 25 50 150 64042 g03 C6 6 8 2 C50 0 75 100 125 5 representative units v cm = v ocm = mid-supply v s = 3v v supply (v) 0 i cc (ma) 15 20 25 3 5 64042 g05 10 5 0 12 4 30 35 40 t a = 125c t a = 105c t a = 90c t a = 75c t a = 50c t a = 25c t a = C10c t a = C45c t a = C60c v cm = v ocm = mid-supply shdn = v + v supply (v) 0 0 i cc (ma) 0.1 0.2 0.3 245 64042 g06 0.4 0.5 13 v cm = v ocm = mid-supply shdn = v C t a = 125c t a = 105c t a = 90c t a = 75c t a = 50c t a = 25c t a = C10c t a = C45c t a = C60c shdn pin voltage (v) 0 C30 shdn pin current (a) C5 C10 C15 C20 1.5 0.5 2.5 3.0 64042 g07 C25 0 1.0 2.0 v cm = v ocm = mid-supply v s = 3v t a = 125c t a = 105c t a = 90c t a = 75c t a = 50c t a = 25c t a = C10c t a = C45c t a = C60c shdn pin voltage (v) 0 i cc (ma) 1.5 0.5 2.5 3.0 64042 g08 1.0 2.0 v cm = v ocm = mid-supply v s = 3v 0 5 10 15 20 25 30 35 t a = 125c t a = 105c t a = 90c t a = 75c t a = 50c t a = 25c t a = C10c t a = C45c t a = C60c frequency (mhz) 10 gain (db) 100 1000 64042 g09 C20 C15 C10 C5 0 5 10 15 unfiltered outputs v cm = v ocm = mid-supply t a = 25c r i = 100, r f = 200, c f in parallel with r f c f = 0pf c f = 1pf v s = 3v v s = 5v
LTC6404 12 6404f small-signal frequency response vs gain setting resistor values small-signal frequency response vs c load small-signal frequency response vs temperature small-signal frequency response vs temperature large-signal step response small-signal step response distortion vs frequency distortion vs input common mode voltage distortion vs output amplitude LTC6404-2 typical performance characteristics frequency (mhz) 10 gain (db) 100 1000 64042 g10 C25 C10 C20 C5 0 5 10 15 unfiltered outputs v cm = v ocm = mid-supply t a = 25c v s = 3v and v s = 5v r i = 100, r f = 200 r i = 499, r f = 1k r i = 200, r f = 402 v s = 3v v s = 5v frequency (mhz) 10 gain (db) 100 1000 64042 g11 C15 C10 C5 0 5 25 10 15 20 c load = 0pf c load = 5pf c load = 10pf unfiltered outputs v cm = v ocm = mid-supply t a = 25c r i = 100, r f = 200 v s = 3v and v s = 5v r load = 200, (each output to ground) frequency (mhz) 10 gain (db) 100 1000 64042 g12 C15 C10 C5 0 5 15 10 unfiltered outputs v cm = v ocm = mid-supply t a = 25c r i = 100, r f = 200 v s = 3v and v s = 5v r load = 200, (each output to ground) t a = 90c t a = 25c t a = C45c frequency (mhz) 10 filtered gain (db) 100 1000 64042 g13 C30 C20 C25 C10 C15 C5 0 5 10 15 t a = 25c t a = 90c v cm = v ocm = mid-supply r i = 100, r f = 200 v s = 3v t a = C45c unfiltered differential output t a = 25c filtered differential output time (ns) 0 C1.5 v outdiff (out + C out C ) (v) C1.0 C0.5 0 61215 64042 g14 0.5 1.0 1.5 39 v cm = v ocm = mid-supply r i = 100, r f = 200 v outdiff v indiff time (ns) 0 C1.00 v outdiff (out + C out C ) (v) C0.75 C0.50 C0.25 0 0.25 0.50 0.75 61215 64042 g15 1.00 39 v cm = v ocm = mid-supply r i = 100, r f = 200 v outdiff v indiff frequency (mhz) 0.1 C100 hd2, hd3 (dbc) C90 C80 C70 C60 1 10 100 64042 g16 C110 C120 C130 C140 C50 C40 v cm = v ocm = mid-supply v s = 3v v outdiff = 2v p-p r f = 100, r i = 200 differential input single-ended input hd2 hd2 hd3 hd3 hd2, hd3 (dbc) 64042 g17 hd2 hd2 hd3 dc common mode input (at in + and in C pins) (v) C110 C40 C50 C60 C70 C80 C90 C100 v s = 3v v cm = v ocm = mid-supply r i = 100, r f = 200 v in = 1v p-p f in = 10mhz differential input single-ended input 0 1.5 0.5 2.5 1.0 2.0 hd3 hd2, hd3 (dbc) 64042 g18 hd2 hd3 v outdiff (v p-p ) C120 C40 C50 C60 C70 C80 C90 C100 C110 v s = 3v v cm = v ocm = mid-supply r i = 100, r f = 200 v in = differential input f in = 10mhz 03 156 24
LTC6404 13 6404f distortion vs output amplitude LTC6404-2 driving ltc2207 16-bit adc (single tone) LTC6404-2 driving ltc2207 16-bit adc (two tones) voltage noise density vs frequency LTC6404-2 noise figure vs frequency LTC6404-2 typical performance characteristics hd2, hd3 (dbc) 64042 g19 hd2 hd3 v outdiff (v p-p ) C120 C40 C50 C60 C70 C80 C90 C100 C110 v s = 3v v cm = v ocm = mid-supply r i = 100, r f = 200 v in = single-ended input f in = 10mhz 03 16 245 (db) 64042 g20 hd2 hd3 hd7 hd5 hd4 frequency (mhz) C120 0 C20 C40 C60 C80 C100 v s = 3.3v v outdiff = 2v p-p v cm = v ocm = 1.25v r i = 100 7 , r f = 200 7 10.1mhz, 16184 point fft f sample = 105msps fundamental = C1dbfs hd2 = C92.4dbc hd3 = C93.02dbc 030 10 50 20 40 (db) 64042 g21 im3l im3u frequency (mhz) C120 0 C20 C40 C60 C80 C100 v s = 3.3v v indiff = 1v p-p fully differential v outdiff = 2v p-p v cm = v ocm = 1.25v r i = 100, r f = 200 16184 point fft f sample = 105msps tone1, tone2 = C7dbfs im3u = C106.8dbc im3l = C107.7dbc 030 10 50 20 40 frequency (mhz) 0.01 voltage noise density (nv/ hz ) 1 100 1000 0.1 10 64042 g22 1 10 100 v s = 3v v cm = v ocm = mid-supply r i = 100, r f = 200 t a = 25c differential input referred common mode frequency (mhz) 0 12 8 4 28 24 20 16 64042 g23 noise figure (db) 10 1000 100 v cm = v ocm = mid-supply v s = 3v t a = 25c see figure 2 circuit
LTC6404 14 6404f LTC6404-4 typical performance characteristics active supply current vs temperature shutdown supply current vs temperature differential voltage offset (input referred) vs temperature common mode voltage offset (input referred) vs temperature active supply current vs supply voltage and temperature shdn supply current vs supply voltage and temperature shdn pin current vs shdn pin voltage and temperature supply current vs shdn pin voltage and temperature small-signal frequency response temperature (c) C75 27 i cc (ma) 28 30 31 32 C25 25 50 150 64044 g01 29 C50 0 75 100 125 33 v s = 2.7v v s = 5v v s = 3v v cm = v ocm = mid-supply temperature (c) C75 0 i cc (ma) 0.1 0.2 0.3 75 100 125 0.7 64044 g02 C50 C25 0 25 50 150 0.4 0.5 0.6 v cm = v ocm = mid-supply v s = 2.7v v s = 3v v s = 5v temperature (c) C75 C1.0 v osdiff (mv) C0.8 C0.4 C0.2 0 1.0 0.4 C25 25 50 150 64044 g03 C0.6 0.6 0.8 0.2 C50 0 75 100 125 5 representative units v cm = v ocm = mid-supply v s = 3v temperature (c) C75 C50 v oscm (mv) C40 C20 C10 0 50 20 C25 25 50 150 64044 g04 C30 30 40 10 C50 0 75 100 125 5 representative units v cm = v ocm = mid-supply v s = 3v v supply (v) 0 i cc (ma) 15 20 25 3 5 64044 g05 10 5 0 12 4 30 35 40 t a = 125c t a = 105c t a = 90c t a = 75c t a = 50c t a = 25c t a = C10c t a = C45c t a = C60c v cm = v ocm = mid-supply shdn = v + v supply (v) 0 0.5 0.6 0.7 4 64044 g06 0.4 0.3 123 5 0.2 0.1 0 i cc (ma) t a = 125c t a = 105c t a = 90c t a = 75c t a = 50c t a = 25c t a = C10c t a = C45c t a = C60c v cm = v ocm = mid-supply shdn = v + shdn pin voltage (v) 0 C30 shdn pin current (a) C25 C20 C15 C10 0 0.5 1.0 1.5 2.0 64044 g07 2.5 3.0 C5 v cm = v ocm = mid-supply v s = 3v t a = 125c t a = 105c t a = 90c t a = 75c t a = 50c t a = 25c t a = C10c t a = C45c t a = C60c shdn pin voltage (v) 0 35 30 25 20 15 10 5 0 1.5 2.5 64044 g08 0.5 1.0 2.0 3.0 i cc (ma) v cm = v ocm = mid-supply v s = 3v t a = 125c t a = 105c t a = 90c t a = 75c t a = 50c t a = 25c t a = C10c t a = C45c t a = C60c frequency (mhz) 10 gain (db) 100 1000 64044 g09 C15 C10 C5 0 5 10 15 20 v cm = v ocm = mid-supply r i = 100, r f = 402, c f in parallel with r f c f = 0pf c f = 1pf v s = 3v v s = 5v
LTC6404 15 6404f small-signal frequency response vs gain setting resistor values small-signal frequency response vs c load small-signal frequency response vs temperature small-signal frequency response vs temperature large-signal step response small-signal step response distortion vs frequency distortion vs input common mode voltage distortion vs output amplitude LTC6404-4 typical performance characteristics frequency (mhz) 10 gain (db) 100 1000 64044 g10 C15 C5 C10 0 5 10 15 20 v cm = v ocm = mid-supply v s = 3v and v s = 5v r i = 100, r f = 402 r i = 200, r f = 800 v s = 3v v s = 5v r i = 140, r f = 562 frequency (mhz) 10 gain (db) 100 1000 64044 g11 C15 C10 C5 0 5 25 10 15 20 c load = 0pf c load = 10pf v cm = v ocm = mid-supply r i = 100, r f = 402 v s = 3v and v s = 5v v s = 3v v s = 5v c load = 5pf frequency (mhz) C15 0 C5 C10 20 15 10 5 64044 g12 gain (db) 10 1000 100 v cm = v ocm = mid-supply r i = 100, r f = 402 v s = 3v and v s = 5v t a = 90c t a = 25c t a = C45c frequency (mhz) 10 filtered gain (db) 100 1000 64044 g13 C20 C25 C10 C15 C5 0 5 10 15 20 t a = 90c v cm = v ocm = mid-supply r i = 100, r f = 402 v s = 3v unfiltered differential output at 25c filtered differential output t a = C45c t a = 25c time (ns) 0 v outdiff (out + C out C ) (v) 0.5 1.5 2.5 12 64044 g14 C0.5 C1.5 0 1.0 2.0 C1.0 C2.0 C2.5 3 6 9 15 v outdiff v indiff v cm = v ocm = mid-supply v s = 3v r i = 100, r f = 402 time (ns) 0 C0.75 voutdiff (out + C out C ) (v) C0.50 C0.25 0 0.25 0.50 0.75 36912 64044 g15 15 v outdiff v indiff v cm = v ocm = mid-supply v s = 3v r i = 100, r f = 402 frequency (mhz) 0.1 C100 hd2, hd3 (dbc) C90 C80 C70 C60 1 10 100 64044 g16 C110 C120 C130 C50 C40 v cm = v ocm = mid-supply v s = 3v v out = 2v p-p r i = 100, r f = 402 differential input single-ended input hd2 hd2 hd3 hd3 dc common mode input (at in + and in C pins) (v) 0 hd2, hd3 (dbc) C90 C80 C70 1.5 2.5 64044 g17 C100 C110 C120 0.5 1.0 2.0 C60 C50 C40 v cm = v ocm = mid-supply v s = 3v r i = 100, r f = 402 f in = 10mhz differential input single-ended input hd2 hd2 hd3 hd3 v outdiff (v p-p ) 0 hd2, hd3 (dbc) C90 C80 C70 3 5 64044 g18 C100 C110 C120 12 4 C60 C50 C40 6 v cm = v ocm = mid-supply v s = 3v r i = 100, r f = 402 f in = 10mhz differential input single-ended input hd2 hd2 hd3 hd3
LTC6404 16 6404f shdn (pin 1): when shdn is ? oating or directly tied to v + , the LTC6404 is in the normal (active) operating mode. when pin 1 is pulled a minimum of 2.1v below v + , the LTC6404 enters into a low power shutdown state. see applications information for more details. v + , v C (pins 2, 10, 11 and pins 3, 9, 12): power supply pins. three pairs of power supply pins are provided to keep the power supply inductance as low as possible to prevent degradation of ampli? er 2nd harmonic performance. see the layout considerations section for more detail. LTC6404-4 driving ltc2207 16-bit adc (single tone) LTC6404-4 driving ltc2207 16-bit adc (two tones) voltage noise density vs frequency LTC6404-4 noise figure vs frequency LTC6404-4 typical performance characteristics frequency (mhz) 0 C40 C20 0 40 64044 g19 C60 C80 10 20 30 50 C100 C120 C140 amplitude (dbfs) v s = 3.3v v outdiff = 2v p-p v cm = v ocm = 1.25v r i = 100, r f = 402 10.1mhz, 64k point fft f sample = 105msps fundamental = C1dbfs hd2 = C98.9dbc hd3 = C99.6dbc frequency (mhz) 0 C40 C20 0 40 64044 g20 C60 C80 10 20 30 50 C100 C120 C140 amplitude (dbfs) v s = 3.3v v outdiff = 2v p-p v cm = v ocm = 1.4v r i = 100, r f = 402 64k point fft f sample = 105msps 9.5mhz, 10.5mhz = C7dbfs imd3l = C100.8dbc imd3u = C102dbc imd3u imd3l frequency (mhz) 10 voltage noise density (nv/ hz ) 0.01 1 10 1000 100 64044 g21 1 0.1 100 v cm = v ocm = mid-supply v s = 3v r i = 100, r f = 402 t a = 25c differential input referred common mode frequency (mhz) 0 12 8 4 28 24 20 16 64044 g22 noise figure (db) 10 1000 100 v cm = v ocm = mid-supply v s = 3v t a = 25c see figure 2 circuit pin functions v ocm (pin 4): output common mode reference voltage. the voltage on v ocm sets the output common mode voltage level (which is de? ned as the average of the volt- ages on the out + and out C pins). the v ocm pin is the midpoint of an internal resistive voltage divider between the supplies, developing a (default) mid-supply voltage potential to maximize output signal swing. in general, the v ocm pin can be overdriven by an external voltage refer- ence capable of driving the input impedance presented by the v ocm pin. on the LTC6404-1, the v ocm pin has a input resistance of approximately 23.5k to a mid-supply
LTC6404 17 6404f pin functions potential. on the LTC6404-2, the v ocm pin has a input resistance of approximately 14k. on the LTC6404-4, the v ocm pin has a input resistance of approximately 7k. the v ocm pin should be bypassed with a high quality ceramic bypass capacitor of at least 0.01f, (unless you are using split supplies, then connect directly to a low impedance, low noise ground plane) to minimize common mode noise from being converted to differential noise by impedance mismatches both externally and internally to the ic. nc (pins 5, 16): no connection. these pins are not con- nected internally. out + , out C (pins 7, 14): un? ltered output pins. besides driving the feedback network, each pin can drive an ad- ditional 50 to ground with typical short-circuit current limiting of 65ma. each ampli? er output is designed to drive a load capacitance of 10pf. this basically means the ampli? er can drive 10pf from each output to ground or 5pf differentially. larger capacitive loads should be decoupled with at least 25 resistors in series with each output. for long-term device reliability, it is recommended that the continuous (dc + ac rms ) output current be limited to under 50ma. outf + , outf C (pins 8, 13): filtered output pins. these pins have a series 50 resistor connected between the ? ltered and un? ltered outputs and three 12pf capacitors. both outf + and outf C have 12pf to v C , plus an additional 12pf differentially between outf + and outf C . this ? lter creates a differential lowpass frequency response with a C3db bandwidth of 88.5mhz. for long-term device reliability, it is recommended that the continuous (dc + ac rms ) output current be limited to under 40ma. in + , in C (pins 15, 6): noninverting and inverting input pins of the ampli? er, respectively. for best performance, it is highly recommended that stray capacitance be kept to an absolute minimum by keeping printed circuit connections as short as possible, and if necessary, stripping back nearby surrounding ground plane away from these pins. exposed pad (pin 17): tie the pad to v C (pins 3, 9, and 12). if split supplies are used, do not tie the pad to ground. block diagram C + 1 5 nc 6 in C 7 out + 8 outf + 16 nc 15 in + 14 out C 13 outf C 2 v + 3 v C v + v + v + v + v + v C v C v + v + 50 12pf 12pf 12pf 66k v C 4 v ocm v ocm 12 v C 6404 bd 11 v + 10 v + 9 v C 50 2 ? r vocm 2 ? r vocm v C v C v + v C v + v C v + v C v + v C v + v C v C v C shdn ic LTC6404-1 LTC6404-2 LTC6404-4 2 ? r vocm 47k 28k 14k
LTC6404 18 6404f applications information figure 1. dc test circuit figure 2. ac test circuit (C3db bw testing) C + 1 shdn 5 6 in C 7 out + 8 outf + 16 15 in + nc nc 14 out C 13 outf C v outf C r f v outf + 2 v + 3 v C v + v + v C v + v C 4 v ocm v shdn v ocm v ocm 12 v C 11 v + 10 v + 9 v C v C v C v C v C 6404 f01 LTC6404 shdn 0.1f 0.01f v cm r f 50 50 12pf 12pf 12pf i l r i r i r bal r bal + C v inp C + v inm i l v in C v in + v out + v out C v outcm v + 0.1f 0.1f 0.1f 0.1f 0.1f v C v C v + 0.1f 0.1f 0.1f 0.1f 0.1f C + 1 shdn 5 6 in C 7 out + 8 outf + 16 15 in + nc nc 14 out C 13 outf C v outf C v outf + 2 v + 3 v C v + v + v C v + v C 4 v ocm v shdn v ocm v ocm 12 v C 11 v + 10 v + 9 v C v C v C 6404 f02 LTC6404 shdn 0.1f 0.01f 0.01f 0.01f 0.01f 0.01f 100 100 50 mini-circuits tcm4-19 mini-circuits tcm4-19 v in C v in + v out + v out C + C v in ? ? 50 ? ? r f r f 50 50 12pf 12pf 12pf r i r i
LTC6404 19 6404f applications information functional description the LTC6404 is a small outline, wide band, low noise, and low distortion fully-differential ampli? er with accurate output phase balancing. the LTC6404 is optimized to drive low voltage, single-supply, differential input 14-bit to 18-bit analog-to-digital converters (adcs). the LTC6404s output is capable of swinging rail-to-rail on supplies as low as 2.7v, which makes the ampli? er ideal for converting ground referenced, single-ended signals into dc level-shifted differential signals in preparation for driving low voltage, single-supply, differential input adcs. unlike traditional op amps which have a single output, the LTC6404 has two outputs to process signals differentially. this allows for two times the signal swing in low voltage systems when compared to single-ended output ampli? ers. the balanced differential nature of the ampli? er also provides even-order harmonic distortion cancellation, and less susceptibility to common mode noise (e.g., power supply noise). the LTC6404 can be used as a single-ended input to differential output ampli? er, or as a differential input to differential output ampli? er. the LTC6404s output common mode voltage, de? ned as the average of the two output voltages, is independent of the input common mode voltage, and is adjusted by applying a voltage on the v ocm pin. if the pin is left open, there is an internal resistive voltage divider that develops a potential halfway between the v + and v C pins. whenever this pin is not hard tied to a low impedance ground plane, it is recommended that a high quality ceramic capacitor is used to bypass the v ocm pin to a low impedance ground plane (see layout considerations in this document). the LTC6404s internal common mode feedback path forces accurate output phase balancing to reduce even order harmonics, and centers each individual output about the potential set by the v ocm pin. vv vv outcm ocm out out == + + ? 2 the outputs (out + and out C ) of the LTC6404 are capable of swinging rail-to-rail. they can source or sink up to ap- proximately 65ma of current. additional outputs (outf + and outf C ) are available that provide ? ltered versions of the out + and out C outputs. an on-chip single pole rc passive ? lter band limits the ? ltered outputs to a C3db frequency of 88.5mhz. the user has a choice of using the un? ltered outputs, the ? ltered outputs, or modifying the ? ltered outputs to adjust the frequency response by adding additional components. in applications where the full bandwidth of the LTC6404 is desired, the un? ltered outputs (out + and out C ) should be used. the un? ltered outputs out + and out C are designed to drive 10pf to ground (or 5pf differentially). capacitances greater than 10pf will produce excess peaking, and can be mitigated by placing at least 25 in series with each output pin. input pin protection the LTC6404s input stage is protected against differential input voltages which exceed 1.4v by two pairs of back- to-back diodes connected in anti-parallel series between in + and in C (pins 6 and 15). in addition, the input pins have steering diodes to either power supply. if the input pair is overdriven, the current should be limited to under 10ma to prevent damage to the ic. the LTC6404 also has steering diodes to either power supply on the v ocm and shdn pins (pins 4 and 1), and if forced to voltages which exceed either supply, they too, should be current-limited to under 10ma. shdn pin if the shdn pin (pin 1) is pulled 2.1v below the posi- tive supply, circuitry is activated which powers down the LTC6404. the pin will have the thevenin equivalent impedance of approximately 66k to v + . if the pin is left unconnected, an internal pull-up resistor of 150k will keep the part in normal active operation. care should be taken to control leakage currents at this pin to under 1a to prevent inadvertently putting the LTC6404 into shutdown. in shutdown, all biasing current sources are shut off, and the output pins, out + and out C , will each appear as open collectors with a non-linear capacitor in parallel and steering diodes to either supply. because of the non-linear capacitance, the outputs still have the ability to sink and source small amounts of transient current if driven by signi? cant voltage transients. the inputs (in + , and in C ) appear as anti-parallel diodes which can conduct
LTC6404 20 6404f applications information if voltage transients at the input exceed 1.4v. the inputs also have steering diodes to either supply. the turn-on and turn-off time between the shutdown and active states is typically less than 1s. general ampli? er applications as levels of integration have increased and correspond- ingly, system supply voltages decreased, there has been a need for adcs to process signals differentially in order to maintain good signal to noise ratios. these adcs are typically supplied from a single supply voltage which can be as low as 3v (2.7v min), and will have an optimal common mode input range near mid-supply. the LTC6404 makes interfacing to these adcs easy, by providing both single-ended to differential conversion as well as com- mon mode level shifting. the front page of this data sheet shows a typical application. referring to figure 1, the gain to v outdiff from v inm and v inp is: vvv r r vv outdiff out out f i inp inm = () + ??? ? note from the above equation, the differential output volt- age (v out + C v out C ) is completely independent of input and output common mode voltages, or the voltage at the common mode pin. this makes the LTC6404 ideally suited for pre-ampli? cation, level shifting and conversion of single ended signals to differential output signals to drive differential input adcs. effects of resistor pair mismatch in the circuit of figure 3, it is possible the gain setting resistors will not perfectly match. assuming in? nite open loop gain, the differential output relationship is given by the equation: vvv r r v v outdiff out out f i indiff avg i =?+ + ?? ? ? n ncm avg ocm v ?? ? where: avg i if i if r rr r rr = + + + ? ? ? ? ? ? 1 2 1 11 2 22 ? r f is the average of r f1 , and r f2 , and r i is the average of r i1 , and r i2 . avg is de? ned as the average feedback factor (or gain) from the outputs to their respective inputs: ? is de? ned as the difference in feedback factors: = ++ r rr r rr i if i if 2 22 1 11 ? figure 3. basic differential ampli? er with feedback resistor pair mismatch v C v C v + 0.1f 0.1f 0.1f 0.1f 0.1f C + 1 shdn 5 6 in C 7 out + 8 outf + 16 15 in + nc nc 14 out C 13 outf C v outf C r f2 v outf + v out C v out + 2 v + 3 v C v + v + v C v + v C 4 v ocm v shdn v vocm v ocm 12 v C 11 v + 10 v + 9 v C v C v C 6404 f03 LTC6404 shdn 0.1f 0.01f r f1 r i2 r i1 + C v inp C + v inm
LTC6404 21 6404f applications information v incm is de? ned as the average of the two input voltages v inp , and v inm (also called the source-referred input com- mon mode voltage): vvv incm inp inm =+ () 1 2 ? and v indiff is de? ned as the difference of the input voltages: v indiff = v inp C v inm when the feedback ratios mismatch ( ? ), common mode to differential conversion occurs. setting the differential input to zero (v indiff = 0), the de- gree of common mode to differential conversion is given by the equation: vvv vv v outdiff out out incm ocm avg i = () + ? ?? ? ? n ndiff = 0 in general, the degree of feedback pair mismatch is a source of common mode to differential conversion of both signals and noise. using 1% resistors or better will mitigate most problems, and will provide about 34db worst-case of common mode rejection. using 0.1% resistors will provide about 54db of common mode rejection. a low impedance ground plane should be used as a reference for both the input signal source, and the v ocm pin. a direct short of v ocm to this ground or bypassing the v ocm with a high quality 0.1f ceramic capacitor to this ground plane, will further prevent common mode signals from being con- verted to differential. there may be concern on how feedback ratio mismatch affects distortion. distortion caused by feedback ratio mis- match using 1% resistors or better is negligible. however, in single supply level shifting applications where there is a voltage difference between the input common mode voltage and the output common mode voltage, resistor mismatch can make the apparent voltage offset of the ampli? er appear higher than speci? ed. the apparent input referred offset induced by feedback ratio mismatch is derived from the following equation: v osdiff(apparent) (v icm C v ocm ) ? ? using the LTC6404-1 in a single supply application on a single 5v supply with 1% resistors, and the input common mode grounded, with the v ocm pin biased at mid-supply, the worst-case dc offset can induce 25mv of apparent offset voltage. with 0.1% resistors, the worst case appar- ent offset reduces to 2.5mv. input impedance and loading effects the input impedance looking into the v inp or v inm input of figure 1 depends on whether the sources v inp and v inm are fully differential. for balanced input sources (v inp = Cv inm ), the input impedance seen at either input is simply: r inp = r inm = r i for single ended inputs, because of the signal imbalance at the input, the input impedance increases over the bal- anced differential case. the input impedance looking into either input is: rr r r rr inp inm i f if == + ? ? ? ? ? ? ? ? ? ? ? ? 1 1 2 ?? input signal sources with non-zero output impedances can also cause feedback imbalance between the pair of feedback networks. for the best performance, it is recommended that the sources output impedance be compensated for. if input impedance matching is required by the source, r1 should be chosen (see figure 4): r rr rr inm s inm s 1 = ? ? figure 4. optimal compensation for signal source impedance v s + C C + r f r f r i r inm r s r i r2 = r s || r1 r1 chosen so that r1 || r inm = r s r2 chosen to balance r1 || r s r1 6404 f04
LTC6404 22 6404f applications information according to figure 4, the input impedance looking into the differential amp (r inm ) re? ects the single ended source case, thus: r r r rr inm i f if = + ? ? ? ? ? ? ? ? ? ? ? ? 1 1 2 ?? r2 is chosen to balance r1 || r s : r rr rr is is 2 = + ? input common mode voltage range the LTC6404s input common mode voltage (v icm ) is de? ned as the average of the two input voltages, v in + , and v in C . it extends from v C to 1.4v below v + . the operating input common mode range depends on the circuit con- ? guration (gain), v ocm and v cm (refer to figure 5). for fully differential input applications, where v inp = Cv inm , the common mode input voltage is approximately: v vv v r rr v r r icm in in ocm i if cm f f = + + ? ? ? ? ? ? + + ? ? ? 2 + + ? ? ? ? ? ? r i with singled ended inputs, there is an input signal com- ponent to the input common mode voltage. applying only v inp (setting v inm to zero), the input common voltage is approximately: v vv v r rr v r r icm in in ocm i if cm f f = + + ? ? ? ? ? ? + + ? ? ? 2 + + ? ? ? ? ? ? + + ? ? ? ? ? ? r vr rr i inp f fi 2 ? output common mode voltage range the output common mode voltage is de? ned as the aver- age of the two outputs: vv vv outcm ocm out out == + + ? 2 the v ocm pin sets this average by an internal common mode feedback loop which internally forces v out + = Cv out C . the output common mode range extends from 1.1v above v C to 1v below v + (see the electrical characteristics table for the LTC6404-4 output common mode voltage range). the v ocm pin sits in the middle of a voltage divider which sets the default mid-supply open circuit potential. figure 5. circuit for common mode range v C v C v + 0.1f 0.1f 0.1f 0.1f 0.1f v cm C + 1 shdn 5 6 in C 7 out + 8 outf + 16 15 in + nc nc 14 out C 13 outf C v outf C r f v outf + v out C v out + 2 v + 3 v C v + v + v C v + v C 4 v ocm v shdn v vocm v ocm 12 v C 11 v + 10 v + 9 v C v C v C 6404 f05 LTC6404 shdn 0.1f 0.01f r f r i r i + C v inp C + v inm
LTC6404 23 6404f in single supply applications, where the LTC6404 is used to interface to an adc, the optimal common mode input range to the adc is often determined by the adcs refer- ence. if the adc makes a reference available for setting the input common mode voltage, it can be directly tied to the v ocm pin, but must be capable of driving the input impedance presented by the v ocm as listed in the electri- cal characteristics table. this impedance can be assumed to be connected to a mid-supply potential. if an external reference drives the v ocm pin, it should still be bypassed with a high quality 0.01f or larger capacitor to a low impedance ground plane to ? lter any thermal noise and to prevent common mode signals on this pin from being inadvertently converted to differential signals. output filter considerations and use filtering at the output of the LTC6404 is often desired to provide either anti-aliasing or improved signal to noise ratio. to simplify this ? ltering, the LTC6404 includes an additional pair of differential outputs (outf + and outf C ) which incorporate an internal lowpass ? lter network with a C3db bandwidth of 88.5mhz (figure 6). these pins each have a dc output impedance of 50 . in- ternal capacitances are 12pf to v C on each ? ltered output, plus an additional 12pf capacitor connected differentially between the two ? ltered outputs. this resistor/capacitor combination creates ? ltered outputs that look like a series 50 resistor with a 36pf capacitor shunting each ? ltered output to ac ground, providing a C3db bandwidth of applications information 88.5mhz, and a noise bandwidth of 139mhz. the ? lter cutoff frequency is easily modi? ed with just a few external components. to increase the cutoff frequency, simply add 2 equal value resistors, one between out + and outf + and the other between out C and outf C (figure 7). these resistors, in parallel with the internal 50 resistor, lower the overall resistance and therefore increase ? lter bandwidth. for example, to double the ? lter bandwidth, add two external 50 resistors to lower the series ? lter resistance to 25 . the 36pf of capacitance remains unchanged, so ? lter bandwidth doubles. keep in mind, the series resistance also serves to decouple the outputs from load capacitance. the un? ltered outputs of the LTC6404 are designed to drive 10pf to ground or 5pf differentially, so care should be taken to not lower the effective impedance between out + and outf + or out C and outf C below 25 . to decrease ? lter bandwidth, add two external capacitors, one from outf + to ground, and the other from outf C to ground. a single differential capacitor connected between outf + and outf C can also be used, but since it is being driven differentially it will appear at each ? ltered output as a single-ended capacitance of twice the value. to halve the ? lter bandwidth, for example, two 36pf capacitors could be added (one from each ? ltered output to ground). alternatively, one 18pf capacitor could be added between the ? ltered outputs, again halving the ? lter bandwidth. combinations of capacitors could be used as well; a three figure 7. LTC6404 filter topology modi? ed for 2x filter bandwidth (2 external resistors) figure 6. LTC6404 internal filter topology C + 7 out + 8 outf + 14 out C 13 outf C 12 v C 9 v C v C v C 6404 f06 LTC6404 filtered output (88.5mhz) 50 12pf 12pf 12pf 50 C + 7 out + 8 outf + 14 out C 13 outf C 12 v C 9 v C v C v C 6404 f07 LTC6404 filtered output (176mhz) 50 49.9 12pf 12pf 12pf 50 49.9
LTC6404 24 6404f figure 8. LTC6404 filter topology modi? ed for 1/2x filter bandwidth (3 external capacitors) capacitor solution of 12pf from each ? ltered output to ground plus a 12pf capacitor between the ? ltered outputs would also halve the ? lter bandwidth (figure 8). noise considerations the LTC6404s input referred voltage noise is on the order of 1.5nv/ hz . its input referred current noise is on the order of 3pa/ hz . in addition to the noise generated by the ampli? er, the surrounding feedback resistors also contribute noise. a noise model is shown in figure 9. the output noise generated by both the ampli? er and the feedback components is governed by the equation: e e r r ir e no ni f i nf n = + ? ? ? ? ? ? ? ? ? ? ? ? + () + ??? ? 12 2 2 2 r ri f i nrf r r e ?? ? ? ? ? ? ? ? ? ? ? ? ? + 2 2 2 a plot of this equation, and a plot of the noise generated by the feedback components for the LTC6404 is shown in figure 10. applications information figure 9. noise model of the LTC6404 C + 7 out + 8 outf + 14 out C 13 outf C 12 v C 9 v C v C v C 6404 f08 LTC6404 filtered output (44.25mhz) 50 12pf 12pf 12pf 12pf 12pf 50 12pf C + 1 shdn 5 6 in C 7 out + 8 outf + 16 15 in + nc nc 14 out C 13 outf C e no 2 r f2 2 v + 3 v C v + v + v C v + v C v ocm v ocm 12 v C 11 v + 10 v + 9 v C v C v C 6404 f09 LTC6404 e nof 2 e nri2 2 shdn r f1 r i2 r i1 v C v + v C 4 e nrf2 2 e nri1 2 e ncm 2 e ni 2 e nrf1 2 i n +2 i n C2
LTC6404 25 6404f applications information the LTC6404s input referred voltage noise contributes the equivalent noise of a 140 resistor. when the feedback network is comprised of resistors whose values are less than this, the LTC6404s output noise is voltage noise dominant (see figure 10.): ee r r no ni f i + ? ? ? ? ? ? ?1 feedback networks consisting of resistors with values greater than about 200 will result in output noise which is resistor noise and ampli? er current noise dominant. eir r r ktr no n f f i f () ++ ? ? ? ? ? ? 214 2 ?? ???? lower resistor values (<100 ) always result in lower noise at the penalty of increased distortion due to increased load- ing of the feedback network on the output. higher resistor values (but still less than 400 ) will result in higher output noise, but improved distortion due to less loading on the output. the optimal feedback resistance for the LTC6404 runs between 100 to 400 . higher resistances are not recommended. the differential ? ltered outputs outf + and outf C will have a little higher spot noise than the un? ltered outputs (due to the two 50 resistors which contribute 0.9nv/hz each), but actually will provide superior signal-to-noise in noise bandwidths exceeding 139mhz due to the noise-? ltering function the ? lter provides. layout considerations because the LTC6404 is a very high speed ampli? er, it is sensitive to both stray capacitance and stray inductance. three pairs of power supply pins are provided to keep the power supply inductance as low as possible to prevent degradation of ampli? er 2nd harmonic performance. it is critical that close attention be paid to supply bypassing. for single supply applications (pins 3, 9 and 12 grounded) it is recommended that 3 high quality 0.1f surface mount ceramic bypass capacitor be placed between pins 2 and 3, between pins 11and 12, and between pins10 and 9 with direct short connections. pins 3, 9 and 10 should be tied directly to a low impedance ground plane with minimal routing. for dual (split) power supplies, it is recommended that at least two additional high quality, 0.1f ceramic capacitors are used to bypass pin v + to ground and v C to ground, again with minimal routing. for driving large loads (<200 ), additional bypass capacitance may be needed for optimal performance. keep in mind that small geometry (e.g. 0603) surface mount ceramic capacitors have a much higher self resonant frequency than do leaded capacitors, and perform best in high speed applications. any stray parasitic capacitances to ground at the sum- ming junctions in + , and in C should be kept to an absolute minimum even if it means stripping back the ground plane away from any trace attached to this node. this becomes especially true when the feedback resistor network uses resistor values >400 in circuits with r f = r i . excessive peaking in the frequency response can be mitigated by add- ing small amounts of feedback capacitance (0.5pf to 2pf) around r f . always keep in mind the differential nature of the LTC6404, and that it is critical that the load impedances seen by both outputs (stray or intended) should be as bal- anced and symmetric as possible. this will help preserve the natural balance of the LTC6404, which minimizes the generation of even order harmonics, and preserves the rejection of common mode signals and noise. it is highly recommended that the v ocm pin be either hard tied to a low impedance ground plane (in split supply applications), or bypassed to ground with a high quality ceramic capacitor whose value exceeds 0.01f. this will help stabilize the common mode feedback loop as well as prevent thermal noise from the internal voltage divider and figure 10. LTC6404-1 output spot noise vs spot noise contributed by feedback network alone r f = r i () 10 0.1 nv/hz 1 10 100 100 1k 10k 6404 f10 feedback resistor network noise alone total (amplifier and feedback network) output noise
LTC6404 26 6404f applications information figure 11. interfacing the LTC6404-1 to a high speed 105msps adc other external sources of noise from being converted to differential noise due to divider mismatches in the feedback networks. it is also recommended that the resistive feed- back networks be comprised of 1% resistors (or better) to enhance the output common mode rejection. this will also prevent v ocm referred common mode noise of the common mode ampli? er path (which cannot be ? ltered) from being converted to differential noise, degrading the differential noise performance. feedback factor mismatch has a weak effect on distortion. using 1% or better resistors should prevent mismatch from impacting ampli? er linearity. however, in single supply level shifting applications where there is a voltage difference between the input common mode voltage and the output common mode voltage, resistor mismatch can make the apparent voltage offset of the ampli? er appear worse than speci? ed. in general, the apparent input referred offset induced by feedback factor mismatch is given by the equation: v osdiff(apparent) (v incm C v ocm ) ? ? where ? = ++ r rr r rr i if i if 2 22 1 11 ? interfacing the LTC6404 to a/d converters the LTC6404s rail-to-rail output and fast settling time make the LTC6404 ideal for interfacing to low voltage, single supply, differential input adcs. the sampling process of adcs create a sampling glitch caused by switching in the sampling capacitor on the adc front end which momentarily shorts the output of the ampli? er as charge is transferred between the ampli? er and the sampling cap. the ampli? er must recover and settle from this load transient before this acquisition period ends for a valid representation of the input signal. in general, the LTC6404 will settle much more quickly from these periodic load impulses than from a 2v input step, but it is a good idea to either use the ? ltered outputs to drive the adc (figure 11 shows an example of this), or to place a discrete r-c ? lter network between the differential un? ltered outputs of the LTC6404 and the input of the adc to help absorb the charge transfer required during the adc sampling process. the capaci- tance of the ? lter network serves as a charge reservoir to provide high frequency charging during the sampling process, while the two resistors of the ? lter network are used to dampen and attenuate any charge kickback from the adc. the selection of the r-c time constant is trial and error for a given adc, but the following guidelines are recommended: choosing too large of a resistor in the decoupling network (leaving insuf? cient settling time) C + 1 shdn 5 6 in C 7 out + 8 outf + 16 15 in + nc nc 14 out C 13 outf C ain + ain C 100 2 v + 3 v C v + v + v C 3.3v v ocm v ocm 12 v C 11 v + 10 v + 9 v C v C v C 6404 f11 LTC6404-1 ltc2207 v in 2v p-p shdn 100 100 100 0.1f 3.3v 4 0.1f 0.1f control gnd v dd d15 ? ? d0 0.1f v cm 2.2f 3.3v 1f 1f
LTC6404 27 6404f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description ud package 16-lead plastic qfn (3mm 3mm) (reference ltc dwg # 05-08-1691) will create a voltage divider between the dynamic input impedance of the adc and the decoupling resistors. choosing too small of a resistor will possibly prevent the resistor from properly damping the load transient caused by the sampling process, prolonging the time required for applications information settling. 16-bit applications typically require a minimum of 11 r-c time constants. it is recommended that the ca- pacitor chosen have a high quality dielectric (for example, c0g multilayer ceramic). 3.00 0.10 (4 sides) recommended solder pad pitch and dimensions 1.45 0.05 (4 sides) note: 1. drawing conforms to jedec package outline mo-220 variation (weed-2) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 0.10 bottom view?exposed pad 1.45 0.10 (4-sides) 0.75 0.05 r = 0.115 typ 0.25 0.05 1 pin 1 notch r = 0.20 typ or 0.25 45 chamfer 15 16 2 0.50 bsc 0.200 ref 2.10 0.05 3.50 0.05 0.70 0.05 0.00 ? 0.05 (ud16) qfn 0904 0.25 0.05 0.50 bsc package outline
LTC6404 28 6404f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2008 lt 0608 ? printed in usa related parts part number description comments lt1809/lt1810 single/dual 180mhz, 350v/s rail-to-rail input and output low distortion op amps 180mhz, 350v/s slew rate, shutdown ltc1992/ltc1992-x fully differential input/output ampli? ers programmable gain or fixed gain (g = 1, 2, 5, 10) lt1994 low noise, low distortion fully differential input/output ampli? er/driver low distortion, 2v p-p , 1mhz: C94dbc, 13ma, low noise: 3nv/hz ltc6400-20 1.8ghz low noise, low distortion, differential adc driver a v = 20db, 90ma supply current, imd3 = C65dbc at 300mhz ltc6400-26 1.9ghz low noise, low distortion, differential adc driver a v = 26db, 85ma supply current, imd3 = C71dbc at 300mhz ltc6401-8 2.2ghz low noise, low distortion, differential adc driver a v = 8db, 45ma supply current, imd3 = C80dbc at 140mhz ltc6401-20 1.3ghz low noise, low distortion, differential adc driver a v = 20db, 50ma supply current, imd3 = C74dbc at 140mhz ltc6401-26 1.6ghz low noise, low distortion, differential adc driver a v = 26db, 45ma supply current, imd3 = C72dbc at 140mhz lt6402-12 300mhz low distortion, low noise differential ampli? er/adc driver a v = 4v/v, nf = 15db, oip3 = 43dbm at 20mhz ltc6406 3ghz low noise, rail-to-rail input differential adc driver low noise: 1.6nv/ hz , low power: 18ma lt6600-2.5 very low noise, fully differential ampli? er and 2.5mhz filter 86db s/n with 3v supply, so-8 package lt6600-5 very low noise, fully differential ampli? er and 5mhz filter 82db s/n with 3v supply, so-8 package lt6600-10 very low noise, fully differential ampli? er and 10mhz filter 82db s/n with 3v supply, so-8 package lt6600-15 very low noise, fully differential ampli? er and 15mhz filter 76db s/n with 3v supply, so-8 package lt6600-20 very low noise, fully differential ampli? er and 20mhz filter 76db s/n with 3v supply, so-8 package ltc6403-1 200mhz low noise, low distortion differential adc driver 10.8ma supply current, C95db distortion at 3mhz


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